NXP Semiconductors QorIQ LS1012A Reference Manual

26.5 Flash memory mapped AMBA busQSPI_AMBA_BASE defines the address to be used as start address of the serial flashdevice as defined by the system memory map. Note that this may be a remapping of thephysical address of the serial flash in the system. Refer to the system address map. Notethat this may be a remapping of the physical address of the serial flash in the system.Refer to the system address map.Table 26-17. QuadSPI AMBA Bus Memory MapAddress Register NameMemory Mapped Serial Flash Data - Individual Flash Mode on Flash AQSPI_AMBA_BASE to (TOP_ADDR_MEMA2 -0x01)Memory Mapped Serial Flash Data - Individual Flash Mode on Flash ARefer to Memory Mapped Serial Flash Data - Individual Flash Mode onFlash A for details and to Table 26-22 and Table 26-23 for informationabout the byte ordering.AHB RX Data Buffer (QSPI_ARDB0 to QSPI_ARDB31)QSPI_ARDB_BASE to… (32 * 4 Byte)QSPI_ARDB_BASE + 0x0000_01FFAHB RX Data Buffer (QSPI_ARDB0 to QSPI_ARDB31) Refer to Table26-22 for information about the byte ordering.NoteAny read access to non-implemented addresses will provideundefined results.In 'Individual Flash Modes', the 3/4 address bytes (asprogrammed in the instruction/operand in the sequence)available for the flash address is determined by SFADR[8:31]or SFADR[0:31] as given in the table above.26.5.1 AHB Bus Access ConsiderationsIt has to be noted that all logic in the QuadSPI module implementing the AHB Bus accessis designed to read the content of an external serial flash device. Therefore, the followingrestrictions apply to the QuadSPI module with respect to accesses to the AHB bus.• At present, the QuadSPI does not support AHB writes so any write access isanswered with the ERROR condition according to the AMBA AHB Specification.No write occurs.Flash memory mapped AMBA busQorIQ LS1012A Reference Manual, Rev. 1, 01/20181474 NXP Semiconductors