FTMx_COMBINE field descriptions (continued)Field Description0 The deadtime insertion in this pair of channels is disabled.1 The deadtime insertion in this pair of channels is enabled.4DECAP3Dual Edge Capture Mode Captures For n = 6Enables the capture of the FTM counter value according to the channel (n) input event and theconfiguration of the dual edge capture bits.This field applies only when DECAPEN = 1.DECAP bit is cleared automatically by hardware if dual edge capture – one-shot mode is selected andwhen the capture of channel (n+1) event is made.0 The dual edge captures are inactive.1 The dual edge captures are active.5DECAPEN3Dual Edge Capture Mode Enable For n = 6Enables the Dual Edge Capture mode in the channels (n) and (n+1). This bit reconfigures the function ofMSnA, ELSnB:ELSnA and ELS(n+1)B:ELS(n+1)A bits in Dual Edge Capture mode according to Table19-6.This field is write protected. It can be written only when MODE[WPDIS] = 1.0 The Dual Edge Capture mode in this pair of channels is disabled.1 The Dual Edge Capture mode in this pair of channels is enabled.6COMP3Complement Of Channel (n) for n = 6Enables Complementary mode for the combined channels. In Complementary mode the channel (n+1)output is the inverse of the channel (n) output.This field is write protected. It can be written only when MODE[WPDIS] = 1.0 The channel (n+1) output is the same as the channel (n) output.1 The channel (n+1) output is the complement of the channel (n) output.7COMBINE3Combine Channels For n = 6Enables the combine feature for channels (n) and (n+1).This field is write protected. It can be written only when MODE[WPDIS] = 1.0 Channels (n) and (n+1) are independent.1 Channels (n) and (n+1) are combined.8ReservedThis field is reserved.This read-only field is reserved and always has the value 0.9FAULTEN2Fault Control Enable For n = 4Enables the fault control in channels (n) and (n+1).This field is write protected. It can be written only when MODE[WPDIS] = 1.0 The fault control in this pair of channels is disabled.1 The fault control in this pair of channels is enabled.10SYNCEN2Synchronization Enable For n = 4Enables PWM synchronization of registers C(n)V and C(n+1)V.Table continues on the next page...Chapter 19 FlexTimer Module (FTM)QorIQ LS1012A Reference Manual, Rev. 1, 01/2018NXP Semiconductors 883