Section number Title Page1.4.16 Serial peripheral interface (SPI).....................................................................................................................1881.4.17 Watchdog timer (WDOG)..............................................................................................................................188Chapter 2Memory Map2.1 Overview.......................................................................................................................................................................1892.2 System memory map.....................................................................................................................................................1892.3 CCSR address map....................................................................................................................................................... 191Chapter 3Signal Descriptions3.1 Signals Introduction...................................................................................................................................................... 1953.2 Signals Overview.......................................................................................................................................................... 1953.3 Configuration signals sampled at reset......................................................................................................................... 2093.4 Signal multiplexing details........................................................................................................................................... 2093.4.1 Ethernet controller 1, SAI, USB 2.0, and GPIO2 signal multiplexing.......................................................... 2103.4.2 Ethernet management interface 1 and GPIO2 signal multiplexing................................................................2123.4.3 eSDHC1 and GPIO1 signal multiplexing...................................................................................................... 2123.4.4 eSDHC2, GPIO1, FTM, SAI, and SPI signal multiplexing...........................................................................2143.4.5 GPIO1 and FTM signal multiplexing............................................................................................................ 2153.4.6 I2C1, GPIO1, and FTM signal multiplexing................................................................................................. 2153.4.7 QuadSPI, I2C, and GPIO1 signal multiplexing............................................................................................. 2163.4.8 UART1 and GPIO signal multiplexing..........................................................................................................2173.4.9 UART2, GPIO, and SAI signal multiplexing................................................................................................ 2173.4.10 USB, ASLEEP, and GPIO1 signal multiplexing........................................................................................... 2183.4.11 TA_TMP_DETECT_B and GPIO2 signal multiplexing............................................................................... 2183.5 Output Signal States During Reset............................................................................................................................... 219Chapter 4Reset, Clocking, and Initialization4.1 Reset, clocking, and initialization overview................................................................................................................. 2214.2 External Signal Descriptions.........................................................................................................................................2214.2.1 System control signals................................................................................................................................... 222QorIQ LS1012A Reference Manual, Rev. 1, 01/20184 NXP Semiconductors