NXP Semiconductors QorIQ LS1012A Reference Manual

Table 10-18. Typical example of memory map along with the register programming(continued)OS, secureconfigurationdetails.Region_14 Disable - - - - - -Region_15 Disable - - - - - -1. Region can be either Enable or Disable.2. Security Permission (sp).3. In a more typical system, these devices would be protected by a TrustZone Protection Controller (BP147), and associatedTrustZone aware AXI to APB Bridges (BP135).NOTEThe implementers system design, and security requirements aretaken into account for this example. And any actual softwareprogramming must depend on the system where TZASC isplugged.10.4.1.6 Denied AXI transactionsIf an AXI transaction has insufficient security privileges then for:• Reads:The TZASC responds to the master by setting all bits of the read data bus tozero.NOTEIf the TZASC is programmed to perform speculativeaccesses, it discards the data that it receives on read data.• Writes:The TZASC prevents the transfer of data from the master to the slave bydiscarding the data of write data bus. If you program the TZASC to performspeculative accesses, it modifies the transfer to the slave by setting all bits of the:• write data bus to zero• write data strobe to zero.NOTEThe action Register controls whether the TZASC signals tothe master when a region permission failure occurs, and ifso, the type of response it provides. See Action register(action).Chapter 10 Arm CoreLink™ TrustZone Address Space Controller TZC-380QorIQ LS1012A Reference Manual, Rev. 1, 01/2018NXP Semiconductors 465