Table 5-1. Clock Summary (continued)Clock name Run modeclock frequencyVLPR modeclock frequencyClock source Clock is disabledwhen…Flash clock Up to 24 MHz Up to 1 MHz in BLPEUp to 800 kHz in BLPIMCGOUTCLK clockdividerIn all stop modesexcept for partialSTOP2 modeInternal reference(MCGIRCLK)30-40 kHz Slow IRCor 4 MHz Fast IRC4 MHz Fast IRC only MCG MCG_C1[IRCLKEN]cleared,Stop/VLPS mode andMCG_C1[IREFSTEN]cleared, orLLS/VLLS modeExternal reference(OSCERCLK)Up to 48 MHz (bypass),30-40 kHzor3-32 MHz (crystal)Up to 16 MHz (bypass),30-40 kHz (low-rangecrystal)or3-16 MHz (high-rangecrystal)System OSC System OSC'sOSC_CR[ERCLKEN]cleared, orStop mode andOSC_CR[EREFSTEN]clearedor VLLS0 and oscillatornot in external clockmode.External reference32kHz(ERCLK32K)30-40 kHz 30-40 kHz System OSC, or RTC_CLKINSystem OSC'sOSC_CR[ERCLKEN]clearedand RTC'sRTC_CR[OSCE]clearedor VLLS0 and oscillatornot in external clockmode.RTC_CLKOUT RTC 1Hz,OSCERCLKRTC 1Hz,OSCERCLKRTC 1Hz,OSCERCLKClock is disabled in LLSand VLLSx modesLPO 1 kHz 1 kHz PMC in VLLS0TPM clock Up to 48 MHz Up to 8 MHz MCGIRCLK,MCGFLLCLK, orOSCERCLKSIM_SOPT2[TPMSRC]=00 or selected clocksource disabled.UART0 clock Up to 48 MHz Up to 8 MHz MCGIRCLK,MCGFLLCLK, orOSCERCLKSIM_SOPT2[UART0SRC]=00 or selected clocksource disabled.1. If in BLPI mode, where clocking is derived from the fast internal reference clock, the Bus clock and flash clock frequencyneeds to be limited to 800 kHz if executing from flash.Clock definitionsKL04 Sub-Family Reference Manual, Rev. 3.1, November 2012104 Freescale Semiconductor, Inc.
