34.4.11 InterruptsThe SPI originates interrupt requests only when the SPI is enabled (the SPE bit in theSPIx_C1 register is set). The following is a description of how the SPI makes a requestand how the MCU should acknowledge that request. The interrupt vector offset andinterrupt priority are chip dependent.Four flag bits, three interrupt mask bits, and one interrupt vector are associated with theSPI system. The SPI interrupt enable mask (SPIE) enables interrupts from the SPIreceiver full flag (SPRF) and mode fault flag (MODF). The SPI transmit interrupt enablemask (SPTIE) enables interrupts from the SPI transmit buffer empty flag (SPTEF). TheSPI match interrupt enable mask bit (SPIMIE) enables interrupts from the SPI match flag(SPMF). When one of the flag bits is set, and the associated interrupt mask bit is set, ahardware interrupt request is sent to the CPU. If the interrupt mask bits are cleared,software can poll the associated flag bits instead of using interrupts. The SPI interruptservice routine (ISR) should check the flag bits to determine which event caused theinterrupt. The service routine should also clear the flag bit(s) before returning from theISR (usually near the beginning of the ISR).34.4.11.1 MODFMODF occurs when the master detects an error on the SS pin. The master SPI must beconfigured for the MODF feature (see the description of the C1[SSOE] bit). Once MODFis set, the current transfer is aborted and the master (MSTR) bit in the SPIx_C1 registerresets to 0.The MODF interrupt is reflected in the status register's MODF flag. Clearing the flag alsoclears the interrupt. This interrupt stays active while the MODF flag is set. MODF has anautomatic clearing process that is described in the SPI Status Register.34.4.11.2 SPRFSPRF occurs when new data has been received and copied to the SPI receive data buffer.After SPRF is set, it does not clear until it is serviced. SPRF has an automatic clearingprocess that is described in the SPI Status Register details. If the SPRF is not servicedbefore the end of the next transfer (that is, SPRF remains active throughout anothertransfer), the subsequent transfers are ignored and no new data is copied into the Dataregister.Chapter 34 Serial Peripheral Interface (SPI)KL04 Sub-Family Reference Manual, Rev. 3.1, November 2012Freescale Semiconductor, Inc. 581
