LPTMRx_PSR field descriptions (continued)Field Description00 Prescaler/glitch filter clock 0 selected.01 Prescaler/glitch filter clock 1 selected.10 Prescaler/glitch filter clock 2 selected.11 Prescaler/glitch filter clock 3 selected.32.3.3 Low Power Timer Compare Register (LPTMRx_CMR)Address: 4004_0000h base + 8h offset = 4004_0008hBit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R 0 COMPAREWReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0LPTMRx_CMR field descriptionsField Description31–16ReservedThis field is reserved.This read-only field is reserved and always has the value 0.15–0COMPARECompare ValueWhen the LPTMR is enabled and the CNR equals the value in the CMR and increments, TCF is set andthe hardware trigger asserts until the next time the CNR increments. If the CMR is 0, the hardware triggerwill remain asserted until the LPTMR is disabled. If the LPTMR is enabled, the CMR must be altered onlywhen TCF is set.32.3.4 Low Power Timer Counter Register (LPTMRx_CNR)Address: 4004_0000h base + Ch offset = 4004_000ChBit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R 0 COUNTERWReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0LPTMRx_CNR field descriptionsField Description31–16ReservedThis field is reserved.This read-only field is reserved and always has the value 0.15–0COUNTERCounter ValueMemory map and register definitionKL04 Sub-Family Reference Manual, Rev. 3.1, November 2012536 Freescale Semiconductor, Inc.
