SIM_SOPT1CFG field descriptionsField Description31–24ReservedThis field is reserved.This read-only field is reserved and always has the value 0.23–0ReservedThis field is reserved.This read-only field is reserved and always has the value 0.12.2.3 System Options Register 2 (SIM_SOPT2)SOPT2 contains the controls for selecting many of the module clock source options onthis device. See the Clock Distribution chapter for more information including clockingdiagrams and definitions of device clocks.Address: 4004_7000h base + 1004h offset = 4004_8004hBit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16R 0UART0SRC TPMSRC0 0WReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R 0CLKOUTSELRTCCLKOUTSEL0WReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SIM_SOPT2 field descriptionsField Description31–28ReservedThis field is reserved.This read-only field is reserved and always has the value 0.27–26UART0SRCUART0 clock source selectSelects the clock source for the UART0 transmit and receive clock.00 Clock disabled01 MCGFLLCLK clock10 OSCERCLK clock11 MCGIRCLK clock25–24TPMSRCTPM clock source selectTable continues on the next page...Memory map and register definitionKL04 Sub-Family Reference Manual, Rev. 3.1, November 2012168 Freescale Semiconductor, Inc.
