3.6.1.3 Flash SecurityHow flash security is implemented on this device is described in Chip Security.3.6.1.4 Flash ModesThe flash memory chapter defines two modes of operation - NVM normal and NVMspecial modes. On this device, The flash memory only operates in NVM normal mode.All references to NVM special mode should be ignored.3.6.1.5 Erase All Flash ContentsIn addition to software, the entire flash memory may be erased external to the flashmemory via the SW-DP debug port by setting MDM-AP CONTROL[0]. MDM-APSTATUS[0] is set to indicate the mass erase command has been accepted. MDM-APSTATUS[0] is cleared when the mass erase completes.3.6.1.6 FTFA_FOPT RegisterThe flash memory's FTFA_FOPT register allows the user to customize the operation ofthe MCU at boot time. See FOPT boot options for details of its definition.3.6.2 Flash Memory Controller ConfigurationThis section summarizes how the module has been configured in the chip. For acomprehensive description of the module itself, see the module’s dedicated chapter.See MCM_PLACR register description for details on the reset configuration of the FMC.Memories and Memory InterfacesKL04 Sub-Family Reference Manual, Rev. 3.1, November 201268 Freescale Semiconductor, Inc.
