SMC_PMCTRL field descriptions (continued)Field Description2–0STOPMStop Mode ControlWhen written, controls entry into the selected stop mode when Sleep-Now or Sleep-On-Exit mode isentered with SLEEPDEEP=1 . Writes to this field are blocked if the protection level has not been enabledusing the PMPROT register. After any system reset, this field is cleared by hardware on any successfulwrite to the PMPROT register.NOTE: When set to VLLSx, the VLLSM bits in the STOPCTRL register is used to further select theparticular VLLS submode which will be entered.NOTE: When set to STOP, the PSTOPO bits in the STOPCTRL register can be used to select a PartialStop mode if desired.000 Normal Stop (STOP)001 Reserved010 Very-Low-Power Stop (VLPS)011 Low-Leakage Stop (LLS)100 Very-Low-Leakage Stop (VLLSx)101 Reserved110 Reseved111 Reserved13.3.3 Stop Control Register (SMC_STOPCTRL)The STOPCTRL register provides various control bits allowing the user to fine tunepower consumption during the stop mode selected by the STOPM field.NOTEThis register is reset on Chip POR not VLLS and by reset typesthat trigger Chip POR not VLLS. It is unaffected by reset typesthat do not trigger Chip POR not VLLS. See the Reset sectiondetails for more information.Address: 4007_E000h base + 2h offset = 4007_E002hBit 7 6 5 4 3 2 1 0Read PSTOPO PORPO 0 0 VLLSMWriteReset 0 0 0 0 0 0 1 1SMC_STOPCTRL field descriptionsField Description7–6PSTOPOPartial Stop OptionThese bits control whether a Partial Stop mode is entered when STOPM=STOP. When entering a PartialStop mode from RUN mode, the PMC, MCG and flash remain fully powered, allowing the device towakeup almost instantaneously at the expense of higher power consumption. In PSTOP2, only systemTable continues on the next page...Memory map and register descriptionsKL04 Sub-Family Reference Manual, Rev. 3.1, November 2012194 Freescale Semiconductor, Inc.
