36.2.7 UART Control Register 3 (UARTx_C3)Address: 4006_A000h base + 6h offset = 4006_A006hBit 7 6 5 4 3 2 1 0Read R8T9 R9T8 TXDIR TXINV ORIE NEIE FEIE PEIEWriteReset 0 0 0 0 0 0 0 0UARTx_C3 field descriptionsField Description7R8T9Receive Bit 8 / Transmit Bit 9When the UART is configured for 9-bit data (M = 1), R8 can be thought of as a ninth receive data bit to theleft of the msb of the buffered data in the UART_D register. When reading 9-bit data, read R8 beforereading UART_D because reading UART_D completes automatic flag clearing sequences that could allowR8 and UART_D to be overwritten with new data.When the UART is configured for 10-bit data (M10 = 1), T9 may be thought of as a tenth transmit data bit.When writing 10-bit data, the entire 10-bit value is transferred to the UART transmit buffer when UART_Dis written so T9 and T8 should be written, if it needs to change from its previous value, before UART_D iswritten. If T9 and T8 do not need to change in the new value, such as when it is used to generate mark orspace parity, they need not be written each time UART_D is written.6R9T8Receive Bit 9 / Transmit Bit 8When the UART is configured for 9-bit data (M = 1), T8 may be thought of as a ninth transmit data bit tothe left of the msb of the data in the UART_D register. When writing 9-bit data, the entire 9-bit value istransferred to the UART transmit buffer after UART_D is written so T8 should be written, if it needs tochange from its previous value, before UART_D is written. If T8 does not need to change in the new value,such as when it is used to generate mark or space parity, it need not be written each time UART_D iswritten.When the UART is configured for 10-bit data (M10 = 1), R9 can be thought of as a tenth receive data bit.When reading 10-bit data, read R9 and R8 before reading UART_D because reading UART_D completesautomatic flag clearing sequences that could allow R8, R9 and UART_D to be overwritten with new data.5TXDIRUART _TX Pin Direction in Single-Wire ModeWhen the UART is configured for single-wire half-duplex operation (LOOPS = RSRC = 1), this bitdetermines the direction of data at the UART_TXD pin. When clearing TXDIR, the transmitter will finishreceiving the current character (if any) before the receiver starts receiving data from the UART_TXD pin.0 UART _TXD pin is an input in single-wire mode.1 UART _TXD pin is an output in single-wire mode.4TXINVTransmit Data InversionSetting this bit reverses the polarity of the transmitted data output.NOTE: Setting TXINV inverts the UART _TXD output for all cases: data bits, start and stop bits, break,and idle.0 Transmit data not inverted.1 Transmit data inverted.3ORIEOverrun Interrupt EnableThis bit enables the overrun flag (OR) to generate hardware interrupt requests.Table continues on the next page...Chapter 36 Universal Asynchronous Receiver/Transmitter (UART0)KL04 Sub-Family Reference Manual, Rev. 3.1, November 2012Freescale Semiconductor, Inc. 631
