Section number Title Page6.3.2 FOPT boot options.......................................................................................................................................1186.3.3 Boot sequence..............................................................................................................................................119Chapter 7Power Management7.1 Introduction...................................................................................................................................................................1217.2 Clocking Modes............................................................................................................................................................1217.2.1 Partial Stop...................................................................................................................................................1217.2.2 DMA Wakeup..............................................................................................................................................1227.2.3 Compute Operation......................................................................................................................................1237.2.4 Peripheral Doze............................................................................................................................................1247.2.5 Clock Gating................................................................................................................................................1257.3 Power modes.................................................................................................................................................................1257.4 Entering and exiting power modes...............................................................................................................................1277.5 Module Operation in Low Power Modes......................................................................................................................127Chapter 8Security8.1 Introduction...................................................................................................................................................................1318.2 Flash Security...............................................................................................................................................................1318.3 Security Interactions with other Modules.....................................................................................................................1318.3.1 Security Interactions with Debug.................................................................................................................132Chapter 9Debug9.1 Introduction...................................................................................................................................................................1339.2 Debug Port Pin Descriptions.........................................................................................................................................1339.3 SWD status and control registers..................................................................................................................................1349.3.1 MDM-AP Control Register..........................................................................................................................1359.3.2 MDM-AP Status Register............................................................................................................................1369.4 Debug Resets................................................................................................................................................................1389.5 Micro Trace Buffer (MTB)...........................................................................................................................................1399.6 Debug in Low Power Modes........................................................................................................................................139KL04 Sub-Family Reference Manual, Rev. 3.1, November 2012Freescale Semiconductor, Inc. 7
