Table 28-60. Typical conversion time (continued)Variable TimeLSTAdder 0 ADCK cyclesHSCAdder 2The resulting conversion time is generated using the parameters listed in in the precedingtable. Therefore, for bus clock and ADCK frequency equal to 20 MHz, the resultingconversion time is 1.45 μs.28.4.4.7 Hardware average functionThe hardware average function can be enabled by setting SC3[AVGE]=1 to perform ahardware average of multiple conversions. The number of conversions is determined bythe AVGS[1:0] bits, which can select 4, 8, 16, or 32 conversions to be averaged. Whilethe hardware average function is in progress, SC2[ADACT] will be set.After the selected input is sampled and converted, the result is placed in an accumulatorfrom which an average is calculated once the selected number of conversions have beencompleted. When hardware averaging is selected, the completion of a single conversionwill not set SC1n[COCO].If the compare function is either disabled or evaluates true, after the selected number ofconversions are completed, the average conversion result is transferred into the dataresult registers, Rn, and SC1n[COCO] is set. An ADC interrupt is generated upon thesetting of SC1n[COCO] if the respective ADC interrupt is enabled, that is,SC1n[AIEN]=1.NoteThe hardware average function can perform conversions on achannel while the MCU is in Wait or Normal Stop modes. TheADC interrupt wakes the MCU when the hardware average iscompleted if SC1n[AIEN] was set.28.4.5 Automatic compare functionThe compare function can be configured to check whether the result is less than orgreater-than-or-equal-to a single compare value, or, if the result falls within or outside arange determined by two compare values. The compare mode is determined bySC2[ACFGT], SC2[ACREN], and the values in the compare value registers, CV1 andChapter 28 Analog-to-Digital Converter (ADC)KL04 Sub-Family Reference Manual, Rev. 3.1, November 2012Freescale Semiconductor, Inc. 447
