6.2.2.7 Software reset (SW)The SYSRESETREQ bit in the NVIC application interrupt and reset control register canbe set to force a software reset on the device. (See ARM's NVIC documentation for thefull description of the register fields, especially the VECTKEY field requirements.)Setting SYSRESETREQ generates a software reset request. This reset forces a systemreset of all major components except for the debug module. A software reset causes theRCM's SRS1[SW] bit to set.6.2.2.8 Lockup reset (LOCKUP)The LOCKUP gives immediate indication of seriously errant kernel software. This is theresult of the core being locked because of an unrecoverable exception following theactivation of the processor’s built in system state protection hardware.The LOCKUP condition causes a system reset and also causes the RCM'sSRS1[LOCKUP] bit to set.6.2.2.9 MDM-AP system reset requestSet the system reset request bit in the MDM-AP control register to initiate a system reset.This is the primary method for resets via the SWD interface. The system reset is helduntil this bit is cleared.Set the core hold reset bit in the MDM-AP control register to hold the core in reset as therest of the chip comes out of system reset.6.2.3 MCU ResetsA variety of resets are generated by the MCU to reset different modules.6.2.3.1 POR OnlyThe POR Only reset asserts on the POR reset source only. It resets the PMC and RTC.The POR Only reset also causes all other reset types to occur.Chapter 6 Reset and BootKL04 Sub-Family Reference Manual, Rev. 3.1, November 2012Freescale Semiconductor, Inc. 115
