MTBDWT memory map (continued)Absoluteaddress(hex)Register name Width(in bits) Access Reset value Section/pageF000_1FCC Device Type Identifier Register (MTBDWT_DEVICETYPID) 32 R 0000_0004h 19.32.8/294F000_1FD0 Peripheral ID Register (MTBDWT_PERIPHID4) 32 R See section 19.32.9/295F000_1FD4 Peripheral ID Register (MTBDWT_PERIPHID5) 32 R See section 19.32.9/295F000_1FD8 Peripheral ID Register (MTBDWT_PERIPHID6) 32 R See section 19.32.9/295F000_1FDC Peripheral ID Register (MTBDWT_PERIPHID7) 32 R See section 19.32.9/295F000_1FE0 Peripheral ID Register (MTBDWT_PERIPHID0) 32 R See section 19.32.9/295F000_1FE4 Peripheral ID Register (MTBDWT_PERIPHID1) 32 R See section 19.32.9/295F000_1FE8 Peripheral ID Register (MTBDWT_PERIPHID2) 32 R See section 19.32.9/295F000_1FEC Peripheral ID Register (MTBDWT_PERIPHID3) 32 R See section 19.32.9/295F000_1FF0 Component ID Register (MTBDWT_COMPID0) 32 R See section 19.32.10/295F000_1FF4 Component ID Register (MTBDWT_COMPID1) 32 R See section 19.32.10/295F000_1FF8 Component ID Register (MTBDWT_COMPID2) 32 R See section 19.32.10/295F000_1FFC Component ID Register (MTBDWT_COMPID3) 32 R See section 19.32.10/29519.32.1 MTB DWT Control Register (MTBDWT_CTRL)The MTBDWT_CTRL register provides read-only information on the watchpointconfiguration for the MTB_DWT.Address: F000_1000h base + 0h offset = F000_1000hBit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R NUMCMP DWTCFGCTRLWReset 0 0 1 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MTBDWT_CTRL field descriptionsField Description31–28NUMCMPNumber of comparatorsThe MTB_DWT implements two comparators.27–0DWTCFGCTRLDWT configuration controlsThis field is hardwired to 0xF00_0000, disabling all the remaining DWT functionality. The specific fieldsand their state are:MTBDWT_CTRL[27] = NOTRCPKT = 1, trace sample and exception trace is not supportedTable continues on the next page...Memory Map and Register DefinitionKL04 Sub-Family Reference Manual, Rev. 3.1, November 2012286 Freescale Semiconductor, Inc.