15.3.4 LLWU Flag 1 register (LLWU_F1)LLWU_F1 contains the wakeup flags indicating which wakeup source caused the MCUto exit LLS or VLLS mode. For LLS, this is the source causing the CPU interrupt flow.For VLLS, this is the source causing the MCU reset flow.The external wakeup flags are read-only and clearing a flag is accomplished by a write ofa 1 to the corresponding WUFx bit. The wakeup flag (WUFx), if set, will remain set ifthe associated WUPEx bit is cleared.NOTEThis register is reset on Chip Reset not VLLS and by resettypes that trigger Chip Reset not VLLS. It is unaffected by resettypes that do not trigger Chip Reset not VLLS. See theIntroduction details for more information.Address: 4007_C000h base + 3h offset = 4007_C003hBit 7 6 5 4 3 2 1 0Read WUF7 WUF6 WUF5 WUF4 WUF3 WUF2 WUF1 WUF0Write w1c w1c w1c w1c w1c w1c w1c w1cReset 0 0 0 0 0 0 0 0LLWU_F1 field descriptionsField Description7WUF7Wakeup Flag For LLWU_P7Indicates that an enabled external wakeup pin was a source of exiting a low-leakage power mode. Toclear the flag write a one to WUF7.0 LLWU_P7 input was not a wakeup source1 LLWU_P7 input was a wakeup source6WUF6Wakeup Flag For LLWU_P6Indicates that an enabled external wakeup pin was a source of exiting a low-leakage power mode. Toclear the flag write a one to WUF6.0 LLWU_P6 input was not a wakeup source1 LLWU_P6 input was a wakeup source5WUF5Wakeup Flag For LLWU_P5Indicates that an enabled external wakeup pin was a source of exiting a low-leakage power mode. Toclear the flag write a one to WUF5.0 LLWU_P5 input was not a wakeup source1 LLWU_P5 input was a wakeup sourceTable continues on the next page...Chapter 15 Low-Leakage Wakeup Unit (LLWU)KL04 Sub-Family Reference Manual, Rev. 3.1, November 2012Freescale Semiconductor, Inc. 225
