Section number Title Page28.4.7 User-defined offset function........................................................................................................................45028.4.8 Temperature sensor......................................................................................................................................45128.4.9 MCU wait mode operation...........................................................................................................................45228.4.10 MCU Normal Stop mode operation.............................................................................................................45228.4.11 MCU Low-Power Stop mode operation......................................................................................................45328.5 Initialization information..............................................................................................................................................45428.5.1 ADC module initialization example............................................................................................................45428.6 Application information................................................................................................................................................45628.6.1 External pins and routing.............................................................................................................................45628.6.2 Sources of error............................................................................................................................................458Chapter 29Comparator (CMP)29.1 Introduction...................................................................................................................................................................46329.2 CMP features................................................................................................................................................................46329.3 6-bit DAC key features.................................................................................................................................................46429.4 ANMUX key features...................................................................................................................................................46529.5 CMP, DAC and ANMUX diagram...............................................................................................................................46529.6 CMP block diagram......................................................................................................................................................46629.7 Memory map/register definitions..................................................................................................................................46829.7.1 CMP Control Register 0 (CMPx_CR0).......................................................................................................46829.7.2 CMP Control Register 1 (CMPx_CR1).......................................................................................................46929.7.3 CMP Filter Period Register (CMPx_FPR)...................................................................................................47129.7.4 CMP Status and Control Register (CMPx_SCR).........................................................................................47129.7.5 DAC Control Register (CMPx_DACCR)....................................................................................................47229.7.6 MUX Control Register (CMPx_MUXCR)..................................................................................................47329.8 Functional description...................................................................................................................................................47429.8.1 CMP functional modes.................................................................................................................................47429.8.2 Power modes................................................................................................................................................48329.8.3 Startup and operation...................................................................................................................................484KL04 Sub-Family Reference Manual, Rev. 3.1, November 2012Freescale Semiconductor, Inc. 19
