NOTEThe prescaler/glitch filter configuration must not be alteredwhen the LPTMR is enabled.32.4.3.1 Prescaler enabledIn Time Counter mode, when the prescaler is enabled, the output of the prescaler directlyclocks the CNR. When the LPTMR is enabled, the CNR will increment every 22 to 216prescaler clock cycles. After the LPTMR is enabled, the first increment of the CNR willtake an additional one or two prescaler clock cycles due to synchronization logic.32.4.3.2 Prescaler bypassedIn Time Counter mode, when the prescaler is bypassed, the selected prescaler clockincrements the CNR on every clock cycle. When the LPTMR is enabled, the firstincrement will take an additional one or two prescaler clock cycles due tosynchronization logic.32.4.3.3 Glitch filterIn Pulse Counter mode, when the glitch filter is enabled, the output of the glitch filterdirectly clocks the CNR. When the LPTMR is first enabled, the output of the glitch filteris asserted, that is, logic 1 for active-high and logic 0 for active-low. The following tableshows the change in glitch filter output with the selected input source.If ThenThe selected input source remains deasserted for at least 21to 215 consecutive prescaler clock rising edgesThe glitch filter output will also deassert.The selected input source remains asserted for at least 21 to215 consecutive prescaler clock rising-edgesThe glitch filter output will also assert.NOTEThe input is only sampled on the rising clock edge.The CNR will increment each time the glitch filter output asserts. In Pulse Counter mode,the maximum rate at which the CNR can increment is once every 22 to 216 prescalerclock edges. When first enabled, the glitch filter will wait an additional one or twoprescaler clock edges due to synchronization logic.Functional descriptionKL04 Sub-Family Reference Manual, Rev. 3.1, November 2012538 Freescale Semiconductor, Inc.
