LLWU_PE1 field descriptions (continued)Field Description10 External input pin enabled with falling edge detection11 External input pin enabled with any change detection3–2WUPE1Wakeup Pin Enable For LLWU_P1Enables and configures the edge detection for the wakeup pin.00 External input pin disabled as wakeup input01 External input pin enabled with rising edge detection10 External input pin enabled with falling edge detection11 External input pin enabled with any change detection1–0WUPE0Wakeup Pin Enable For LLWU_P0Enables and configures the edge detection for the wakeup pin.00 External input pin disabled as wakeup input01 External input pin enabled with rising edge detection10 External input pin enabled with falling edge detection11 External input pin enabled with any change detection15.3.2 LLWU Pin Enable 2 register (LLWU_PE2)LLWU_PE2 contains the field to enable and select the edge detect type for the externalwakeup input pins LLWU_P7-LLWU_P4.NOTEThis register is reset on Chip Reset not VLLS and by resettypes that trigger Chip Reset not VLLS. It is unaffected by resettypes that do not trigger Chip Reset not VLLS. See theIntroduction details for more information.Address: 4007_C000h base + 1h offset = 4007_C001hBit 7 6 5 4 3 2 1 0Read WUPE7 WUPE6 WUPE5 WUPE4WriteReset 0 0 0 0 0 0 0 0LLWU_PE2 field descriptionsField Description7–6WUPE7Wakeup Pin Enable For LLWU_P7Enables and configures the edge detection for the wakeup pin.00 External input pin disabled as wakeup input01 External input pin enabled with rising edge detectionTable continues on the next page...Memory map/register definitionKL04 Sub-Family Reference Manual, Rev. 3.1, November 2012222 Freescale Semiconductor, Inc.
