LLWU_F3 field descriptions (continued)Field DescriptionIndicates that an enabled internal peripheral was a source of exiting a low-leakage power mode. To clearthe flag, follow the internal peripheral flag clearing mechanism.0 Module 2 input was not a wakeup source1 Module 2 input was a wakeup source1MWUF1Wakeup flag For module 1Indicates that an enabled internal peripheral was a source of exiting a low-leakage power mode. To clearthe flag, follow the internal peripheral flag clearing mechanism.0 Module 1 input was not a wakeup source1 Module 1 input was a wakeup source0MWUF0Wakeup flag For module 0Indicates that an enabled internal peripheral was a source of exiting a low-leakage power mode. To clearthe flag, follow the internal peripheral flag clearing mechanism.0 Module 0 input was not a wakeup source1 Module 0 input was a wakeup source15.3.6 LLWU Pin Filter 1 register (LLWU_FILT1)LLWU_FILT1 is a control and status register that is used to enable/disable the digitalfilter 1 features for an external pin.NOTEThis register is reset on Chip Reset not VLLS and by resettypes that trigger Chip Reset not VLLS. It is unaffected by resettypes that do not trigger Chip Reset not VLLS. See theIntroduction details for more information.Address: 4007_C000h base + 5h offset = 4007_C005hBit 7 6 5 4 3 2 1 0Read FILTFFILTE0FILTSELWrite w1cReset 0 0 0 0 0 0 0 0LLWU_FILT1 field descriptionsField Description7FILTFFilter Detect FlagIndicates that the filtered external wakeup pin, selected by FILTSEL, was a source of exiting a low-leakagepower mode. To clear the flag write a one to FILTF.Table continues on the next page...Memory map/register definitionKL04 Sub-Family Reference Manual, Rev. 3.1, November 2012228 Freescale Semiconductor, Inc.
