• VSSA is shared on the same pin as the MCU digital VSS.• VSSA and VDDA are shared with the MCU digital supply pins—In these cases, thereare separate pads for the analog supplies bonded to the same pin as the correspondingdigital supply so that some degree of isolation between the supplies is maintained.If separate power supplies are used for analog and digital power, the ground connectionbetween these supplies must be at the VSSA pin. This must be the only ground connectionbetween these supplies, if possible. VSSA makes a good single point ground location.28.6.1.2 Analog voltage reference pinsIn addition to the analog supplies, the ADC module has connections for two referencevoltage inputs used by the converter:• VREFSH is the high reference voltage for the converter.• VREFSL is the low reference voltage for the converter.The ADC can be configured to accept one of two voltage reference pairs for VREFSH andVREFSL. Each pair contains a positive reference and a ground reference. The two pairs areexternal, VREFH and VREFL and alternate, VALTH and VALTL. These voltage references areselected using SC2[REFSEL]. The alternate voltage reference pair, VALTH and VALTL,may select additional external pins or internal sources based on MCU configuration. Seethe chip configuration information on the voltage references specific to this MCU.In some packages, the external or alternate pairs are connected in the package to VDDAand VSSA, respectively. One of these positive references may be shared on the same pinas VDDA on some devices. One of these ground references may be shared on the same pinas VSSA on some devices.If externally available, the positive reference may be connected to the same potential asVDDA or may be driven by an external source to a level between the minimum RefVoltage High and the VDDA potential. The positive reference must never exceed VDDA. Ifexternally available, the ground reference must be connected to the same voltagepotential as VSSA. The voltage reference pairs must be routed carefully for maximumnoise immunity and bypass capacitors placed as near as possible to the package.AC current in the form of current spikes required to supply charge to the capacitor arrayat each successive approximation step is drawn through the VREFH and VREFL loop. Thebest external component to meet this current demand is a 0.1 μF capacitor with goodhigh-frequency characteristics. This capacitor is connected between VREFH and VREFLand must be placed as near as possible to the package pins. Resistance in the path is notrecommended because the current causes a voltage drop that could result in conversionerrors. Inductance in this path must be minimum, that is, parasitic only.Chapter 28 Analog-to-Digital Converter (ADC)KL04 Sub-Family Reference Manual, Rev. 3.1, November 2012Freescale Semiconductor, Inc. 457
