System Integration Module (SIM)MCF5253 Reference Manual, Rev. 19-12 Freescale Semiconductor9.4.2.1 Interrupt Level SelectionThe interrupt level, intpri[1:7], of the 64 interrupts serviced by the secondary interrupt controller can beprogrammed for every interrupt separately. Every interrupt is given a 4-bit field in one of the interruptpriority register. This 4-bit field controls level setting for the interrupt. Values 1–7 correspond withColdFire interrupt priorities. Value 0 is off.9.4.2.2 Interrupt Vector Generation RegisterAll secondary interrupts are autovectored. The vector number for interrupt 0 is given by registerINTBASE. The vector numbers for the other interrupts are offset from this number. Vector number forinterrupt 23 is e.g. INTBASE + 23. The secondary interrupt controller will generate vector numbersINTBASE to INTBASE + 63 for its 64 interrupts.MBAR2 + $16B INTBASE 8 Interrupt base vector $00 R/WMBAR2 + $167 SPURVEC 8 spurious vector $00 R/WTable 9-12. Secondary Interrupt Level Programming Bit AssignmentAddress Name Bit31–28Bit27–24Bit23–20Bit19–16Bit15–12Bit11–8Bit7–4Bit3–0MBAR2 + $140 INTPRI1 INT7 INT6 INT5 INT4 INT3 INT2 INT1 INT0MBAR2 + $144 INTPRI2 INT15 INT14 INT13 INT12 INT11 INT10 INT9 INT8MBAR2 + $148 INTPRI3 INT23 INT22 INT21 INT20 INT19 INT18 INT17 INT16MBAR2 + $14C INTPRI4 INT31 INT30 INT29 INT28 INT27 INT26 INT25 INT24MBAR2 + $150 INTPRI5 INT39 INT38 INT37 INT36 INT35 INT34 INT33 INT32MBAR2 + $154 INTPRI6 INT47 INT46 INT45 INT44 INT43 INT42 INT41 INT40MBAR2 + $158 INTPRI7 INT55 INT54 INT53 INT52 INT51 INT50 INT49 INT48MBAR2 + $15C INTPRI8 INT63 INT62 INT61 INT60 INT59 INT58 INT57 INT56Address MBAR2 + $16B Access: User read/write7 6 5 4 3 2 1 0R BASE[7] BASE[6] BASE[5] BASE[4] BASE[3] BASE[2] BASE[1] BASE[0]WReset 0 0 0 0 0 0 0 0Figure 9-7. INTBase RegisterTable 9-11. Secondary Interrupt Controller Registers Memory Map (continued)Address Name Width Description Reset Value Access
