UART ModulesMCF5253 Reference Manual, Rev. 1Freescale Semiconductor 15-515.3.1 Baud-Rate Generator/TimerThe timer references made here relative to clocking the UART are different than the MCF5253 timermodule that is integrated on the bus of the ColdFire core. The UART has a baud generator based on aninternal baud-rate timer that is dedicated to the UART. The Clock Select Register (UCSR) needs to beprogrammed to enable the baud-rate timer. With the baud-rate timer, a prescaler supplies an asynchronous32x clock source to the baud-rate timer. The baud-rate timer register value is programmed with the UBG1and UBG2 registers. See Section 15.4.12, “Baud Rate Generator (MSB) Register (UBG1n),” for moreinformation.Figure 15-3. Baud-Rate Timer Generator Diagram15.3.1.1 Calculating Baud RatesThe system clock goes through a divide-by-32 prescaler and then passes through the 16-bit divider of theconcatenated UBG1n and UBG2n registers. The baud-rate calculation is:Eqn. 15-1Using a 80-MHz system clock and letting baud rate equal 19200, thenEqn. 15-2Therefore, UBG1n equals 0x00 and UBG2n equals 0x82.15.3.2 Transmitter and Receiver Operating ModesThe functional block diagram of the transmitter and receiver, including command and operating registers,is shown in Figure 15-4. The following paragraphs describe these functions in reference to this diagram.For detailed register information, refer to Section 15.4, “UART Memory Map and Register Definitions.”System ClockTimerOutput InternalTimerx32PrescalerBaudRateUARTBaud rate outputprogrammed in UCSRBaudrate f sys32 x Divider[ ]------------------------------------=Divider 80MHz32 x 19200[ ]---------------------------------- 130 decimal( ) 0x0082 hexadecimal( )= = =
