Audio Interface Module (AIM)MCF5253 Reference Manual, Rev. 1Freescale Semiconductor 17-17Bits are ordered first bit left. So, C-channel bit “0” is seen in bit position 31 in the EBURcvCChannelregister. C-channel bit “31” is seen as the LSB bit in the register.17.6.1.3 Control Channel Interrupt (IEC958 “C” Channel New Frame)When the value of a new IEC958 “C” channel frame is loaded into the EBURcvCChannel register, aninterrupt is generated. This interrupt is cleared when the processor writes the corresponding bit in theInterruptClear register. EBURcvCChannel is double buffered. However the register can be read at any timeand provide true values the interrupt only indicates that a NEW “C” channel value has been loaded.17.6.1.4 Validity Flag ReceptionAn interrupt is associated with the Validity flag. (interrupt 24 - IEC958ValNoGood). This interrupt is setevery time a frame is seen on the IEC958 interface with the validity bit set to “invalid”.17.6.1.5 IEC958 Exception DefinitionThere are several IEC958 exceptions defined that will trigger an interrupt. These are:• Control channel change—Set when EBURcvCChannel register is updated. The register is updatedfor every new C-Channel received. The exception is reset when EBURcvCChannel register is read.• EBU Illegal Symbol—Set on reception of illegal symbol during IEC958 receive. Reset by writingregister InterruptClear. Refer to Section 17.7.7, “Audio Interrupts” for details. The EBU input is abiphase/mark modulated signal. The time between any two successive transitions of the EBUsignal is always 1, 2 or 3 EBU symbol periods long. The EBU receiver will parse the stream, andsplit it in so-called symbols. It recognizes s1, s2 and s3 symbols, depending on the length of thesymbols. Not all sequences of these symbols are allowed. To give an example, a sequences2-s1-s1-s1-s2 cannot occur in a error-free EBU signal. If the receiver finds such an illegalsequence, the illegal symbol interrupt is set. No corrective action is undertaken.When the interrupt occurs, this means:a) The EBU signal is has been affected by noiseAddress MBAR2 + 0X24 (EBU1RCVCCHANNEL)MBAR2 + 0XD4 (EBU2RCVCCHANNEL)Access: User read only31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16R EBURcvC Channel1 and Channel2WReset – – – – – – – – – – – – – – – –15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R EBURcvC Channel1 and Channel2WReset – – – – – – – – – – – – – – – –Figure 17-9. EBURcvCChannel Register
