Universal Serial Bus InterfaceMCF5253 Reference Manual, Rev. 124-150 Freescale Semiconductor• All FS ISO transactions:— Hub Address = 0— siTD.EPS = 00 (full speed)Maximum Packet Size must less than or equal to 1023 or undefined behavior may result.24.12.1.5 Operational ModelThe operational models are well defined for the behavior of the Transaction Translator (see USB 2.0specification) and for the EHCI controller moving packets between system memory and a USB-HS hub.Since the embedded Transaction Translator exists within the USB module there is no physical bus betweenEHCI host controller driver and the USB FS/LS bus. These sections will briefly discuss the operationalmodel for how the EHCI and Transaction Translator operational models are combined without the physicalbus between. The following sections assume the reader is familiar with both the EHCI and USB 2.0Transaction Translator operational models.24.12.1.5.1 Microframe PipelineThe EHCI operational model uses the concept of H-frames and B-frames to describe the pipeline betweenthe Host (H) and the Bus (B). The embedded Transaction Translator shall use the same pipeline algorithmsspecified in the USB 2.0 specification for a Hub-based Transaction Translator.All periodic transfers always begin at B-frame 0 (after SOF) and continue until the stored periodic transfersare complete. As an example of the microframe pipeline implemented in the embedded TransactionTranslator, all periodic transfers that are tagged in EHCI to execute in H-frame 0 will be ready to executeon the bus in B-frame 0.It is important to note that when programming the S-mask and C-masks in the EHCI data structures toschedule periodic transfers for the embedded Transaction Translator, the EHCI host controller driver mustfollow the same rules specified in EHCI for programming the S-mask and C-mask for downstreamHub-based Transaction Translators.Once periodic transfers are exhausted, any stored asynchronous transfer will be moved. Asynchronoustransfers are opportunistic in that they shall execute whenever possible and their operation is not tied toH-frame and B-frame boundaries with the exception that an asynchronous transfer can not babble throughthe SOF (start of B-frame 0).24.12.1.5.2 Split State MachinesThe start and complete split operational model differs from EHCI slightly because there is no bus mediumbetween the EHCI controller and the embedded Transaction Translator. Where a start or complete-splitoperation would occur by requesting the split to the HS hub, the start/complete split operation is simple aninternal operation to the embedded Transaction Translator. Table 24-94 summarizes the conditions wherehandshakes are emulated from internal state instead of actual handshakes to HS split bus traffic.
