IDE and Flash Media InterfaceMCF5253 Reference Manual, Rev. 113-2 Freescale SemiconductorFigure 13-1. Bus Setup with IDE and SmartMedia InterfaceIn this example there is only one buffer between the MCF5253 memory bus and the IDE / SmartMediainterface. The SDRAM (if used) is connected directly to the memory bus along with the Flash memory (ifused). The buffer therefore provides isolation (and signal buffering) between the memory bus componentsand the slow, high capacitance and low impedance IDE bus. Thus allowing access to the SDRAM at thehighest memory bus speed (70MHz) possible. The buffer also prevents the SDRAM and Flash ROMsignals from going to/from the IDE / SmartMedia interfaces.In some systems where the Flash ROM load may be excessively high or there is the requirement foradditional devices on the memory bus such as an additional SRAM or Ethernet controller. It maybenecessary to provide further isolation and buffering of the memory bus between the MCF5253 / SDRAM.There is provision for an additional buffer control signal in the system. The “first” bus buffer isolates theMCF5253 / SDRAM bus from the flash ROM and any other additional devices (SRAM, EthernetController, etc.). The “second” bus buffer prevents the flash ROM signals from going to/from IDE andSmartMedia interfaces. The IDE and SmartMedia interfaces share most signals with the ColdFire addressand data bus.MCF5253
