UART ModulesMCF5253 Reference Manual, Rev. 1Freescale Semiconductor 15-3The UART module interrupt level in the MCF5253 interrupt controller is programmed external to theUART module. The UART can be configured to supply the vector from the UART Interrupt VectorRegister (UIVR) or the SIM can be programmed to provide an autovector when a UART interrupt isacknowledged.The interrupt level, priority within the level, and autovectoring capability can also be programmed in theSIM register ICR_U1.15.2 UART Module Signal DefinitionsThe following paragraphs contain a brief description of the UART module signals. Figure 15-2 shows boththe external and internal signal groups.NOTEThe terms assertion and negation are used throughout this chapter to avoidconfusion when dealing with a mixture of active-low and active-highsignals. The term assert or assertion indicates that a signal is active or true,independent of the level represented by a high or low voltage. The termnegate or negation indicates that a signal is inactive or false.15.2.1 Transmitter Serial Data OutputThe multiplexed signals TXD0/GPIO45, SCL1/TXD1/GPIO10 and XTRIM/TXD2/GPIO0 can beprogrammed as general purpose outputs or transmitter serial data outputs. When used as transmitters, theoutput is held high ('‘mark’' condition) when the transmitter is disabled, idle, or operating in the localloopback mode. Data is shifted out on this signal on the falling edge of the clock source, with the leastsignificant bit transmitted first.15.2.2 Receiver Serial Data InputThe multiplexed signals RXD0/GPIO46, SDA1/RXD1/GPIO44, and EF/RXD2/GPIO6 can beprogrammed as general purpose inputs or receiver serial data inputs. When used as receivers, data receivedon this signal is sampled on the rising edge of the clock source, with the least significant bit received first.
