Audio Interface Module (AIM)MCF5253 Reference Manual, Rev. 117-36 Freescale Semiconductor28 IIS2TxResyn IIS2 transmit FIFO resync reg. IntClear27 EBUTxUnOv EBU (IEC958) transmit FIFO under/overrun reg. IntClear26 EBUTxResyn EBU (IEC958) transmit FIFO resync reg. IntClear25 EBUCNew EBU (IEC958) Rx change of value of the C channel reg. IntClear24 IEC958ValNoGood IEC958 Validity Flag no good reg. IntClear23 EBUSymErr IEC958 receiver found illegal symbol reg. IntClear22 EBUBitErr IEC958 receiver found parity bit error reg. IntClear21 UChanTxEm UChannelTransmit register empty write to tx reg20 UChanTxUnder UchannelTransmit register underrun reg. IntClear19 UChanTx-NextFirst UchannelTransmit register next byte will be first write to Tx reg18 UChanRcvFull UChannelReceive register full read Rcv reg17 UChanRcvOver UChannelReceive register overrun reg. IntClear16 QChanRvFull QChannelReceive register full read rcv reg15 QChanOverrun QChannelReceive register overrun reg. IntClear14 UQChanSync U/Q channel sync found reg. IntClear13 UQChanErr U/Q channel framing error reg IntClear12 Pdir1UnOv Processor data input underrun/overrun reg IntClear11 Pdir1Resyn Processor data input resync reg IntClear10 Pdir2UnOv Processor data input underrun/overrun reg IntClear9 Pdir2Resyn Processor data input resync reg IntClear8 audioTick audio tick interrupt reg IntClear7 U2CHANRCVOVERQ2CHANOVERRUNUQ2CHANERRIEC958 receiver 2 U/Q channel error reg IntClear6 Pdir3Resyn Processor data input resync reg IntClear5 PDIR3 full Processor data input full read from PDIR34 iis1TxEmpty IIS 1 transmit FIFO empty write to FIFO3 iis2TxEmpty IIS 2 transmit FIFO empty write to FIFO2 ebuTxEmpty IEC958 transmit FIFO empty write to FIFO1 PDIR2 full Processor data input full read from PDIR20 PDIR1 full Processor data input full read from PDIR1Table 17-20. Interrupt Register Field Description (0x94, 0x98) (continued)Bit Interrupt Name Description How to Clear
