Universal Serial Bus InterfaceMCF5253 Reference Manual, Rev. 1Freescale Semiconductor 24-2724.6.3.11 Transmit FIFO Tuning Controls Register (TXFILLTUNING)—Non-EHCIThis register is not defined in the EHCI specification. This register is used to control and dynamicallychange the burst size used during data movement on DMA transfers. It is used only in host mode.The fields in this register control performance tuning associated with how the module posts data to the TXlatency FIFO before moving the data onto the USB bus. The specific areas of performance include the howmuch data to post into the FIFO and an estimate for how long that operation should take in the targetsystem.Definitions:T0 = Standard packet overheadT1 = Time to send data payloadTs = Total Packet Flight Time (send-only) packet (Ts = T0 + T1)Tff = Time to fetch packet into TX FIFO up to specified level.Tp = Total Packet Time (fetch and send) packet (T p = Tff + Ts)Upon discovery of a transmit (OUT/SETUP) packet in the data structures, host controller checks to ensureTp remains before the end of the [micro]frame. If so it proceeds to pre-fill the TX FIFO. If at anytimeduring the pre-fill operation the time remaining the [micro]frame is < Ts then the packet attempt ceases andthe packet is tried at a later time. Although this is not an error condition and the module eventuallyrecovers, a mark is made in the scheduler health counter to note the occurrence of a back-off event. Whena back-off event is detected, the partial packet fetched may need to be discarded from the latency buffer tomake room for periodic traffic that will begin after the next SOF. Too many back-off events can wastebandwidth and power on the system bus and thus should be minimized (not necessarily eliminated).Back-offs can be minimized with use of the TSCHHEALTH (Tff) parameter described below.Table 24-24. Master Interface Data Burst Size (BURSTSIZE) Register Field DescriptionsField Description31–16 Reserved.15–8TXPBURSTProgramable TX Burst Length. This register represents the maximum length of a burst in 32-bit words whilemoving data from system memory to the USB bus. Must not be set to greater that 4.7–0RXPBURSTProgramable RX Burst Length. This register represents the maximum length of a burst in 32-bit words whilemoving data from the USB bus to system memory. Must not be set to greater than 4.
