ColdFire CoreMCF5253 Reference Manual, Rev. 1Freescale Semiconductor 3-132. The OEP does not experience any sequence-related pipeline stalls. For ColdFire 5200 processors,the most common example of this type of stall involves consecutive store operations, excluding theMOVEM instruction. For all STORE operations (except MOVEM), certain hardware resourceswithin the processor are marked as “busy” for two clock cycles after the final DSOC cycle of thestore instruction. If a subsequent STORE instruction is encountered within this 2-cycle window, itwill be stalled until the resource again becomes available. Thus, the maximum pipeline stallinvolving consecutive STORE operations is 2 cycles. The MOVEM instruction uses a different setof resources and this stall does not apply.3. The OEP completes all memory accesses without any stall conditions caused by the memory itself.Thus, the timing details provided in this section assume that an infinite zero-wait state memory isattached to the processor core.4. All operand data accesses are aligned on the same byte boundary as the operand size, i.e., 16 bitoperands aligned on 0-modulo-2 addresses, 32 bit operands aligned on 0-modulo-4 addresses.If the operand alignment fails these guidelines, it is misaligned. The processor core decomposes themisaligned operand reference into a series of aligned accesses as shown in Table 3-8.3.6.2 MOVE Instruction Execution TimesThe execution times for the MOVE.{B,W} instructions are shown in Table 3-9, while Table 3-10 providesthe timing for MOVE.L.NOTEFor all tables in this section, the execution time of any instruction using thePC-relative effective addressing modes is the same for the comparableAn-relative mode.The nomenclature “xxx.wl” refers to both forms of absolute addressing, xxx.w and xxx.l.Table 3-8. Misaligned Operand ReferencesAddress[1:0] Size KBUS Operations Additional C(R/W)X1 Word Byte, Byte 2(1/0) if read1(0/1) if writeX1 Long Byte, Word, Byte 3(2/0) if read2(0/2) if write10 Long Word, Word 2(1/0) if read1(0/1) if writeTable 3-9. Move Byte and Word Execution TimesSourceDestinationRx (Ax) (Ax)+ -(Ax) (d16 ,Ax) (d8 ,Ax,Xi) (xxx).wlDn 1(0/0) 1(0/1) 1(0/1) 1(0/1) 1(0/1) 2(0/1) 1(0/1)An 1(0/0) 1(0/1) 1(0/1) 1(0/1) 1(0/1) 2(0/1) 1(0/1)(An) 3(1/0) 3(1/1) 3(1/1) 3(1/1) 3(1/1) 4(1/1) 3(1/1)
