Chip Select ModuleMCF5253 Reference Manual, Rev. 1Freescale Semiconductor 10-9Address MBAR + 0x96 (CSCR1)MBAR + 0xA2 (CSCR2)MBAR + 0xAE (CSCR3)MBAR + 0xBA (CSCR4)Access: User read/write15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R WS3 WS2 WS1 WS0 AA PS1 PS0 BSTR BSTWWReset – – – – – – – – – – – – – – – 0Figure 10-4. Chip Select Control Registers (CSCRx)Table 10-5. Chip Select Control Register (CSCRx) Field DescriptionsField Description15–14 Reserved.13–10WSThe Wait States field defines the number of wait states that are inserted before an internal transfer acknowledge isgenerated. If the AA bit is cleared, TA must be asserted by the external system regardless of the number of waitstates generated.9 Reserved.8AAThe Auto-Acknowledge Enable field determines the assertion of the internal transfer-acknowledge for accessesspecified by the chip select address.0 No internal transfer acknowledge (TA) is asserted.1 Internal acknowledge (TA) is asserted as specified by WS[3:0].7–6PSThe Port Size field specifies the width of the data associated with each chip select. It determines where data is drivenduring write cycles and where data is sampled during read cycles. Port size should always be programmed to16-bits.00 Reserved.01 Reserved.10 16-bit port size–Data sampled and driven on D[31:16] only.11 16-bit port size–Data sampled and driven on D[31:16] only.Note: A0 is not available on the external bus.5 Reserved.4BSTRThe Burst Read Enable field specifies whether burst reads are used for the memory associated with each chipselect.0 Breaks data larger than the specified port size into individual non-burst reads that equals the specified port size.For example, a longword read from an 16-bit port would be broken into two individual wordreads.1 Enables burst read of data larger than the specified port size.3BSTWThe Burst Write Enable field specifies whether burst writes are used for the memory associated with each chipselect.0 Break data larger than the specified port size into individual non-burst writes that equals the specified port size.For example, a longword write to an 16-bit port would be broken into two individual word writes.1 Enables burst write of data larger than the specified port size.2–0 Reserved.
