Advanced Technology Attachment Controller (ATA)MCF5253 Reference Manual, Rev. 1Freescale Semiconductor 23-523.4.1.2 ATA_DIOR (Out)This signal correspond to ATA signal DIOR. During PIO and multiword DMA transfer, function is readstrobe. During ultra DMA in burst, function is HDMARDY. During ultra DMA out burst, function is hoststrobe.23.4.1.3 ATA_DIOW (Out)This signal corresponds to ATA signal DIOW. During PIO and multiword DMA transfer, function is writestrobe. During ultra DMA burst, function is STOP, signalling whenever host wants to terminate runningultra DMA transfer.23.4.1.4 ATA_CS0, ATA_CS1, ATA_A0, ATA_A1, ATA_A2 (Out)These signals are the address group of the ATA bus. ATA_CS0 and ATA_CS1 are the chip selects;ATA_A0, ATA_A1, and ATA_A2 are the 3 address lines. All five lines follow the same timing.23.4.1.5 ATA_DMARQ (In)This signal is the ATA bus device DMA request. It is pulled high by the device if it wants to transfer datausing multiword DMA or ultra DMA mode.23.4.1.6 ATA_DMACK (Out)This signal is the ATA bus host DMA acknowledge. It is pulled low by the host when it grants the DMArequest.23.4.1.7 ATA_INTRQ (In)This signal is the ATA bus interrupt request. It is pulled high by the device whenever it wants to interruptthe host CPU.23.4.1.8 ATA_IORDY (In)This signal is the ATA bus IORDY line. It has three functions:• IORDY⎯active low wait during PIO cycles• DDMARDY⎯active low device ready during ultra DMA out transfers• DSTROBE⎯device strobe during ultra DMA in transfers23.4.1.9 ATA_D[15:0] (In/Out/Tri-state)This is the ATA data bus.23.4.2 Electrical Spec on the ATA Bus, Bus BuffersTo meet electrical spec on the ATA bus, several requirements must be met. For a detailed description, referto the ATA specification.
