Universal Serial Bus InterfaceMCF5253 Reference Manual, Rev. 124-36 Freescale Semiconductor20BSEISB Session End Interrupt Status. This bit is set when VBus has fallen below the B session end threshold.The software must write a one to clear this bit.19BSVISB Session Valid Interrupt Status. This bit is set when VBus has either risen above or fallen below the B session validthreshold (0.8 VDC).The software must write a one to clear this bit.18ASVISA Session Valid Interrupt Status. This bit is set when VBus has either risen above or fallen below the A session validthreshold (0.8 VDC).The software must write a one to clear this bit.17AVVISA VBus Valid Interrupt Status. This bit is set when VBus has either risen above or fallen below the VBus valid threshold(4.4 VDC) on an A device.The software must write a one to clear this bit.16IDISUSB ID Interrupt Status. This bit is set when a change on the ID input has been detected.The software must write a one to clear this bit.15 Reserved.14DPSData Bus Pulsing Status.1 Pulsing detected on port0 No pulsing on port131msT1 millisecond timer toggle. This bit toggles once per millisecond.12BSEB Session End.1 VBus is below the B session end threshold.0 VBus is above the B session end threshold.11BSVB Session Valid.1 VBus is above the B session valid threshold.0 VBus is below the B session valid threshold.10ASVA Session Valid.1 VBus is above the A session valid threshold.0 VBus is below the A session valid threshold.9AVVA VBus Valid.1 VBus is above the A VBus valid threshold.0 VBus is below the A VBus valid threshold.8IDUSB ID1 B device0 A device7HABAHardware assist B-disconnect to A-connect0 Disabled1 Enable automatic B-disconnect to A-connect sequence6HADPHardware assist data pulse0 No pulse sequence started1 Start data pulse sequence5 Reserved.Table 24-28. OTG Status Control (OTGSC) Register Field Descriptions (continued)Field Description
