Universal Serial Bus InterfaceMCF5253 Reference Manual, Rev. 124-84 Freescale SemiconductorFigure 24-50. Asynchronous Schedule List with Annotation to Mark Head of List24.9.9.4 Asynchronous Schedule Traversal: Start EventOnce the host controller has idled itself using the empty schedule detection, it naturally activates andbegins processing from the Periodic Schedule at the beginning of each micro-frame. In addition, it mayhave idled itself early in a micro-frame. When this occurs (idles early in the micro-frame) the hostcontroller must occasionally reactivate during the micro-frame and traverse the asynchronous schedule todetermine whether any progress can be made. Asynchronous schedule Start Events are defined to be:• Whenever the host controller transitions from the periodic schedule to the asynchronous schedule.If the periodic schedule is disabled and the asynchronous schedule is enabled, then the beginningof the micro-frame is equivalent to the transition from the periodic schedule, or• The asynchronous schedule traversal restarts from a sleeping state.24.9.9.5 Reclamation Status Bit (USBSTS Register)The operation of the empty asynchronous schedule detection feature depends on the proper managementof the Reclamation bit in the USBSTS register. The host controller tests for an empty schedule just after itfetches a new queue head while traversing the asynchronous schedule. The host controller sets theReclamation bit whenever an asynchronous schedule traversal Start Event occurs. The Reclamation bit isalso set whenever the host controller executes a transaction while traversing the asynchronousschedule.The host controller clears the Reclamation bit whenever it finds a queue head with its H-bit set.The software should only set a queue head's H-bit if the queue head is in the asynchronous schedule. If thesoftware sets the H-bit in an interrupt queue head, the resulting behavior is undefined. The host controllermay clear the Reclamation bit when executing from the periodic schedule.24.9.10 Managing Control/Bulk/Interrupt Transfers via Queue HeadsThis section presents an overview of how the host controller interacts with queuing data structures.Queue heads use the Queue Element Transfer Descriptor (qTD) structure defined in Section 24.8.5,“Queue Element Transfer Descriptor (qTD).”USBSTSReclamation FlagUSBCMD•••AsyncListAddr 01Horizontal Ptr 01H•••OperationalRegistersOperationalAreaHorizontal Ptr0HOperationalArea0HOperationalAreaTyp T01 0Typ T01 0Typ THorizontal PtrList HeadAsynchronous Schedule1: Transaction Executed0: Head of List Seen
