I 2 C ModulesMCF5253 Reference Manual, Rev. 1Freescale Semiconductor 18-15MOVE.B D0,TXCNTBRA.S EMASTX ;ExitEND LEA.L MBCR,-(A7) ;Generate a STOP conditionBCLR.B #5,(A7)+EMASTX RTE; Return from interruptIf a master receiver wants to terminate a data transfer, it must inform the slave transmitter by notacknowledging the last byte of data, which can be done by setting the transmit acknowledge bit (TXAK)before reading the next-to-last byte of data. Before reading the last byte of data, a STOP signal must firstbe generated. The following code is an example showing how a master receiver generates a STOP signal.MASR MOVE.B RXCNT,D0 ;Decrease RXCNTSUBQ.L #1,D0MOVE.B D0,RXCNTBEQ.S ENMASR ;Last byte to be readMOVE.B RXCNT,D1 ;Check second-to-last byte to be readEXTB.L D1SUBI.L #1,D1 ;BNE.S NXMAR ; Not last one or second lastLAMAR BSET.B #3,MBCR ;Disable ACKBRA NXMARENMASR BCLR.B #5,MBCR ; Last one, generate 'STOP'signalNXMAR MOVE.B MBDR,RXBUF ; Read data and store RTE18.6.5 Generation of Repeated STARTAt the end of data transfer, if the master still wants to communicate on the bus, it can generate anotherSTART signal followed by another slave address without first generating a STOP signal. A programexample follows.RESTART MOVE.B MBCR,-(A7) ; Another START (RESTART)BSET.B #2, (A7)MOVE.B (A7)+, MBCRMOVE.B CALLING,-(A7) ;Transmit the calling address, D0=R/W-MOVE.B CALLING,-(A7) ;MOVE.B (A7)+, MBDR18.6.6 Slave ModeIn the slave interrupt service routine, the module that is addressed as slave bit (IAAS), should be tested tocheck if a calling of its own address was received. If IAAS is set, software should set the transmit/receivemode select bit (MTX bit of MBCR) according to the R/W command bit (SRW). Writing to the MBCRclears the IAAS automatically. The only time IAAS is read as set is from the interrupt at the end of theaddress cycle where an address match occurred; interrupts resulting from subsequent data transfers willhave IAAS cleared. A data transfer can now be initiated by writing information to MBDR, for slavetransmits, or read from MBDR, in slave-receive mode. A dummy read of the MBDR in slave/receive modewill release SCL, allowing the master to transmit data.In the slave transmitter routine, the received acknowledge bit (RXAK) must be tested before transmittingthe next byte of data. Setting RXAK means an “end-of-data’' signal from the master receiver, after whichit must be switched from transmitter mode to receiver mode by software. A read from MBDR then releasesthe SCL line so that the master can generate a STOP signal.
