MCF5253 Reference Manual, Rev. 1Freescale Semiconductor 2-1Chapter 2Signal Description2.1 OverviewThis chapter describes the MCF5253 input and output signals. The signal descriptions as shown inTable 2-1 are grouped according to relevant functionality.Table 2-1. MCF5253 Signal IndexSignal Name Mnemonic Function Input/OutputResetStateAddress A[24:1]A[23]/GPO5424 address lines—address 23 ismultiplexed with GPO54 and address24 is multiplexed with A20 (SDRAMaccess only).Out XRead-write control RW Bus write enable—indicates if read orwrite cycle in progress.Out HOutput enable OE Output enable for asynchronousmemories connected to chip selectsOut NegatedData D[31:16] Data bus used to transfer word data In/Out Hi_ZSynchronous rowaddress strobeSDRAS/GPIO59 Row address strobe for externalSDRAMOut NegatedSynchronous columnaddress strobeSDCAS/GPIO39 Column address strobe for externalSDRAMOut NegatedSDRAM write enable SDWE/GPIO38 Write enable for external SDRAM Out NegatedSDRAM upper byteenableSDUDQM/GPO53 Upper byte enable—indicates duringwrite cycle if high byte is written.Out –SDRAM lower byteenableSDLDQM/GPO52 Lower byte enable—indicates duringwrite cycle if low byte is written.Out –SDRAM chip selects SD_CS0/GPIO60 SDRAM chip select In/Out NegatedSDRAM clock enable BCLKE/GPIO63 SDRAM clock enable Out –System clock BCLK/GPIO40 SDRAM clock output In/Out –ISA bus read strobe IDE_DIOR/GPIO31(CS2)1 ISA bus read strobe and 1 ISA buswrite strobe—allow connection of anindependent ISA bus peripheral, suchas an IDE slave device.In/Out –ISA bus write strobe IDE_DIOW/GPIO32(CS2)In/Out –ISA bus wait signal IDE_IORDY/GPIO33 ISA bus wait line available for bothbussesIn/Out –
