Universal Serial Bus InterfaceMCF5253 Reference Manual, Rev. 1Freescale Semiconductor 24-69management policy implemented in a particular operating system. When the system software intends tosuspend the bus, it should suspend the enabled port, then shut off the controller by setting the Run/Stop bitin the USBCMD register to a zero.When a wake event occurs the system will resume operation, and the system software must set theRun/Stop bit to a one and resume the suspended port.24.9.4.1 Port Suspend/ResumeThe system software places the USB into suspend mode by writing a one into the appropriate PORTSCSuspend bit. The software must only set the Suspend bit when the port is in the enabled state (Port Enabledbit is a one).The host controller may evaluate the Suspend bit immediately or wait until a micro-frame or frameboundary occurs. If evaluated immediately, the port is not suspended until the current transaction (if oneis executing) completes. Therefore, there may be several micro-frames of activity on the port until the hostcontroller evaluates the Suspend bit. The host controller must evaluate the Suspend bit at least every frameboundary.The system software can initiate a resume on the suspended port by writing a one to the Force Port Resumebit. The software should not attempt to resume a port unless the port reports that it is in the suspended state.If the system software sets the Force Port Resume bit when the port is not in the suspended state, theresulting behavior is undefined. In order to assure proper USB device operation, the software must waitfor at least 10 milliseconds after a port indicates that it is suspended (Suspend bit is a one) before initiatinga port resume via the Force Port Resume bit. When Force Port Resume bit is set, the host controller sendsresume signaling down the port. The system software times the duration of the resume (nominally 20milliseconds) then clears the Force Port Resume bit. When the host controller receives the write totransition Force Port Resume to zero, it completes the resume sequence as defined in the USBspecification, and clears both the Force Port Resume and Suspend bits. Software-initiated port resumes donot affect the Port Change Detect bit in the USBSTS register nor do they cause an interrupt if the PortChange Interrupt Enable bit in the USBINTR register is a one. When a wake event occurs on a suspendedport, the resume signaling is detected by the port and the resume is reflected downstream within 100 μsec.The port's Force Port Resume bit is set and the Port Change Detect bit in the USBSTS register is set. If thePort Change Interrupt Enable bit in the USBINTR register is a one the host controller issues a hardwareinterrupt.The system software observes the resume event on the port, delays a port resume time (nominally 20milliseconds), then terminates the resume sequence by clearing the Force Port Resume bit in the port. Thehost controller receives the write of zero to Force Port Resume, terminates the resume sequence and clearsthe Force Port Resume and Suspend port bits. The software can determine that the port is enabled (notsuspended) by sampling the PORTSC register and observing that the Suspend and Force Port Resume bitsare zero. The software must ensure that the host controller is running (that is, HCHalted bit in the USBSTSregister is a zero), before terminating a resume by clearing the port's Force Port Resume bit. If HCHaltedis a one when Force Port Resume is cleared, then SOFs will not occur down the enabled port and the devicewill return to suspend mode in a maximum of 10 milliseconds.Table 24-63 summarizes the wake-up events. Whenever a resume event is detected, the Port ChangeDetect bit in the USBSTS register is set. If the Port Change Interrupt Enable bit is a one in the USBINTR
