NXP Semiconductors freescale K51 Series Reference Manual

CMT_CGH1 field descriptionsField Description7–0PHPrimary Carrier High Time Data ValueWhen selected, these bits contain the number of input clocks required to generate the carrier high timeperiod. When operating in Time mode, this register is always selected. When operating in FSK mode, thisregister and the secondary register pair are alternately selected under control of the modulator. Theprimary carrier high time value is undefined out of reset. These bits must be written to non-zero valuesbefore the carrier generator is enabled to avoid spurious results.41.6.2 CMT Carrier Generator Low Data Register 1 (CMT_CGL1)This data register contain the primary low value for generating the carrier output.Address: CMT_CGL1 is 4006_2000h base + 1h offset = 4006_2001hBit 7 6 5 4 3 2 1 0Read PLWriteReset x* x* x* x* x* x* x* x** Notes:x = Undefined at reset.•CMT_CGL1 field descriptionsField Description7–0PLPrimary Carrier Low Time Data ValueWhen selected, these bits contain the number of input clocks required to generate the carrier low timeperiod. When operating in Time mode, this register is always selected. When operating in FSK mode, thisregister and the secondary register pair are alternately selected under control of the modulator. Theprimary carrier low time value is undefined out of reset. These bits must be written to non-zero valuesbefore the carrier generator is enabled to avoid spurious results.Chapter 41 Carrier Modulator Transmitter (CMT)K51 Sub-Family Reference Manual, Rev. 6, Nov 2011Freescale Semiconductor, Inc. 1015