NXP Semiconductors freescale K51 Series Reference Manual

UARTx_MA2 field descriptionsField Description7–0MAMatch Address48.3.11 UART Control Register 4 (UARTx_C4)Addresses: UART0_C4 is 4006_A000h base + Ah offset = 4006_A00AhUART1_C4 is 4006_B000h base + Ah offset = 4006_B00AhUART2_C4 is 4006_C000h base + Ah offset = 4006_C00AhUART3_C4 is 4006_D000h base + Ah offset = 4006_D00AhUART4_C4 is 400E_A000h base + Ah offset = 400E_A00AhUART5_C4 is 400E_B000h base + Ah offset = 400E_B00AhBit 7 6 5 4 3 2 1 0Read MAEN1 MAEN2 M10 BRFAWriteReset 0 0 0 0 0 0 0 0UARTx_C4 field descriptionsField Description7MAEN1Match Address Mode Enable 1Refer to Match address operation for more information.0 All data received is transferred to the data buffer if MAEN2 is cleared.1 All data received with the most significant bit cleared, is discarded. All data received with the mostsignificant bit set, is compared with contents of MA1 register. If no match occurs, the data isdiscarded. If match occurs, data is transferred to the data buffer.This bit must be cleared whenC7816[ISO7816E] is set/enabled.6MAEN2Match Address Mode Enable 2Refer to Match address operation for more information.0 All data received is transferred to the data buffer if MAEN1 is cleared.1 All data received with the most significant bit cleared, is discarded. All data received with the mostsignificant bit set, is compared with contents of MA2 register. If no match occurs, the data isdiscarded. If match occurs, data is transferred to the data buffer.This bit must be cleared whenC7816[ISO7816E] is set/enabled.5M1010-bit Mode selectThe M10 bit causes a tenth, non-memory mapped bit to be part of the serial transmission. This tenth bit isgenerated and interpreted as a parity bit. The M10 bit does not affect the LIN send or detect breakbehavior. If M10 is set then both C1[M] and C1[PE] bits must also be set. This bit must be cleared whenC7816[ISO7816E] is set/enabled. Refer to Data format (non ISO-7816) for more information.Table continues on the next page...Memory map and registersK51 Sub-Family Reference Manual, Rev. 6, Nov 20111238 Freescale Semiconductor, Inc.