NXP Semiconductors freescale K51 Series Reference Manual

AXBS_CRSn field descriptions (continued)Field Description001 Park on master port M1010 Park on master port M2011 Park on master port M3100 Park on master port M4101 Park on master port M5110 Reserved111 Reserved17.2.3 Master General Purpose Control Register (AXBS_MGPCRn)The MGPCR controls only whether the master’s undefined length burst accesses areallowed to complete uninterrupted or whether they can be broken by requests from higherpriority masters. The MGPCR can only be accessed in Supervisor mode with 32-bitaccesses.Addresses: AXBS_MGPCR0 is 4000_4000h base + 800h offset = 4000_4800hAXBS_MGPCR1 is 4000_4000h base + 900h offset = 4000_4900hAXBS_MGPCR2 is 4000_4000h base + A00h offset = 4000_4A00hAXBS_MGPCR3 is 4000_4000h base + B00h offset = 4000_4B00hAXBS_MGPCR4 is 4000_4000h base + C00h offset = 4000_4C00hAXBS_MGPCR5 is 4000_4000h base + D00h offset = 4000_4D00hAXBS_MGPCR6 is 4000_4000h base + E00h offset = 4000_4E00hAXBS_MGPCR7 is 4000_4000h base + F00h offset = 4000_4F00hBit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R 0 AULBWReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0AXBS_MGPCRn field descriptionsField Description31–3ReservedThis read-only field is reserved and always has the value zero.2–0AULBArbitrates on undefined length burstsDetermines whether, and when, the crossbar switch arbitrates away the slave port the master owns whenthe master is performing undefined length burst accesses.000 No arbitration is allowed during an undefined length burst001 Arbitration is allowed at any time during an undefined length burst010 Arbitration is allowed after four beats of an undefined length burst011 Arbitration is allowed after eight beats of an undefined length burst100 Arbitration is allowed after 16 beats of an undefined length burstTable continues on the next page...Memory Map / Register DefinitionK51 Sub-Family Reference Manual, Rev. 6, Nov 2011356 Freescale Semiconductor, Inc.