Section Number Title Page46.3.7 DSPI PUSH TX FIFO Register In Master Mode (SPIx_PUSHR)...............................................................114746.3.8 DSPI PUSH TX FIFO Register In Slave Mode (SPIx_PUSHR_SLAVE)..................................................114946.3.9 DSPI POP RX FIFO Register (SPIx_POPR)...............................................................................................114946.3.10 DSPI Transmit FIFO Registers (SPIx_TXFRn)...........................................................................................115046.3.11 DSPI Receive FIFO Registers (SPIx_RXFRn)............................................................................................115046.4 Functional Description..................................................................................................................................................115146.4.1 Start and Stop of DSPI Transfers.................................................................................................................115246.4.2 Serial Peripheral Interface (SPI) Configuration...........................................................................................115246.4.3 DSPI Baud Rate and Clock Delay Generation.............................................................................................115646.4.4 Transfer Formats..........................................................................................................................................116046.4.5 Continuous Serial Communications Clock..................................................................................................116546.4.6 Slave Mode Operation Constraints..............................................................................................................116646.4.7 Interrupts/DMA Requests............................................................................................................................116746.4.8 Power Saving Features.................................................................................................................................116946.5 Initialization/Application Information..........................................................................................................................117046.5.1 How to Manage DSPI Queues.....................................................................................................................117046.5.2 Switching Master and Slave Mode..............................................................................................................117146.5.3 Baud Rate Settings.......................................................................................................................................117246.5.4 Delay Settings..............................................................................................................................................117246.5.5 Calculation of FIFO Pointer Addresses.......................................................................................................1173Chapter 47Inter-Integrated Circuit (I2C)47.1 Introduction...................................................................................................................................................................117747.1.1 Features........................................................................................................................................................117747.1.2 Modes of Operation.....................................................................................................................................117847.1.3 Block Diagram.............................................................................................................................................117847.2 I2C Signal Descriptions................................................................................................................................................117947.3 Memory Map and Register Descriptions......................................................................................................................117947.3.1 I2C Address Register 1 (I2Cx_A1)..............................................................................................................1181K51 Sub-Family Reference Manual, Rev. 6, Nov 2011Freescale Semiconductor, Inc. 41