NXP Semiconductors freescale K51 Series Reference Manual

In some packages, VREFH is connected in the package to VDDA and VREFL to VSSA. Ifexternally available, the positive reference(s) may be connected to the same potential asVDDA or may be driven by an external source to a level between the minimum RefVoltage High and the VDDA potential (VREFH must never exceed VDDA). Connect theground references to the same voltage potential as VSSA.31.2.4 Analog channel inputs (ADx)The ADC module supports up to 24 single-ended analog inputs. A single-ended input isselected for conversion through the ADCH channel select bits when the DIFF bit in theSC1n register is low.31.2.5 Differential analog channel inputs (DADx)The ADC module supports up to 4 differential analog channel inputs. Each differentialanalog input is a pair of external pins (DADPx and DADMx) referenced to each other toprovide the most accurate analog to digital readings. A differential input is selected forconversion through the ADCH channel select bits when the DIFF bit in the SC1n registerbit is high. All DADPx inputs may be used as single-ended inputs if the DIFF bit is low.In certain MCU configurations, some DADMx inputs may also be used as single-endedinputs if the DIFF bit is low. Refer to the Chip Configuration chapter for ADCconnections specific to this MCU.31.3 Register DefinitionThis section describes the ADC registers.ADC memory mapAbsoluteaddress(hex)Register name Width(in bits) Access Reset value Section/page4003_B000 ADC status and control registers 1 (ADC0_SC1A) 32 R/W 0000_001Fh 31.3.1/7104003_B004 ADC status and control registers 1 (ADC0_SC1B) 32 R/W 0000_001Fh 31.3.1/7104003_B008 ADC configuration register 1 (ADC0_CFG1) 32 R/W 0000_0000h 31.3.2/713Table continues on the next page...Chapter 31 Analog-to-Digital Converter (ADC)K51 Sub-Family Reference Manual, Rev. 6, Nov 2011Freescale Semiconductor, Inc. 707