NXP Semiconductors freescale K51 Series Reference Manual

49.4.20 ADMA Error Status Register (SDHC_ADMAES)When an ADMA error interrupt has occurred, the ADMA error states field in this registerholds the ADMA state and the ADMA system address register holds the address aroundthe error descriptor.For recovering from this error, the host driver requires the ADMA state to identify theerror descriptor address as follows:• ST_STOP: Previous location set in the ADMA System Address register is the errordescriptor address.• ST_FDS: Current location set in the ADMA System Address register is the errordescriptor address.• ST_CADR: This state is never set because it only increments the descriptor pointerand doesn’t generate an ADMA error.• ST_TFR: Previous location set in the ADMA System Address register is the errordescriptor address.In case of a write operation, the host driver should use the ACMD22 to get the number ofthe written block, rather than using this information, since unwritten data may exist in thehost controller.The host controller generates the ADMA error interrupt when it detects invalid descriptordata (valid = 0) in the ST_FDS state. The host driver can distinguish this error by readingthe valid bit of the error descriptor.Table 49-30. ADMA Error State CodingD01-D00 ADMA error state (when error hasoccurred)Contents of ADMA system addressregister00 ST_STOP (Stop DMA) Holds the address of the nextexecutable descriptor command01 ST_FDS (fetch descriptor) Holds the valid descriptor address10 ST_CADR (change address) No ADMA error is generated11 ST_TFR (Transfer Data) Holds the address of the nextexecutable descriptor commandMemory map and register definitionK51 Sub-Family Reference Manual, Rev. 6, Nov 20111350 Freescale Semiconductor, Inc.