NXP Semiconductors freescale K51 Series Reference Manual

50.4.1 Detailed operating mode descriptionsThe following sections provide detailed descriptions of the above modes.50.4.1.1 Normal modeNormal mode is the simplest mode of the I2S. It transfers data in one time slot per frame.A time slot is a unit of data and the RCCR[WL] bits define the number of bits in a timeslot. In continuous clock mode, a frame sync occurs at the beginning of each frame. Thefollowing factors determine the length of the frame:• Period of the serial bit clock (TCCR[DIV2], TCCR[PSR], TCCR[PM] bits forinternal clock or the frequency of the external clock on the STCK port)• Number of bits per time slot (RCCR[WL] bits)• Number of time slots per frame (TCCR[DC] bits)If normal mode is configured with more than one time slot per frame, data transfers onlyin the first time slot of the frame. No data transfers in subsequent time slots. In normalmode, TCCR[DC] values corresponding to more than a single time slot in a frame onlyresult in lengthening the frame.50.4.1.1.1 Normal mode transmitConditions for data transmission from the I2S in normal mode are:1. I2S enabled (CR[I2SEN] = 1)2. Enable FIFO and configure transmit and receive watermark if the FIFO is used3. Write data to transmit data register (TX)4. Transmitter enabled (CR[TE] = 1)5. Frame sync active (for continuous clock case)6. Bit clock begins (for gated clock case)When the above conditions occur in normal mode, the next data word transfers into thetransmit shift register (TXSR) from the transmit data register 0 (TX0), or from thetransmit FIFO 0 register, if enabled.• In continuous clock mode, the data word is transmitted on arrival of frame-syncpreceded by clocks.Functional descriptionK51 Sub-Family Reference Manual, Rev. 6, Nov 20111454 Freescale Semiconductor, Inc.