NXP Semiconductors freescale K51 Series Reference Manual

SDHC_PROCTL field descriptions (continued)Field Description9–8DMASDMA SelectThis field is valid while DMA (SDMA or ADMA) is enabled and selects the DMA operation.00 No DMA or simple DMA is selected01 ADMA1 is selected10 ADMA2 is selected11 Reserved7CDSSCard Detect Signal SelectionThis bit selects the source for the card detection.0b Card detection level is selected (for normal purpose)1b Card detection test level is selected (for test purpose)6CDTLCard Detect Test LevelThis is bit is enabled while the CDSS is set to 1 and it indicates card insertion.0b Card detect test level is 0, no card inserted1b Card detect test level is 1, card inserted5–4EMODEEndian ModeThe SDHC supports all four endian modes in data transfer.00b Big endian mode01b Half word big endian mode10b Little endian mode11b Reserved3D3CDDAT3 as Card Detection PinIf this bit is set, DAT3 should be pulled down to act as a card detection pin. Be cautious when using thisfeature, because DAT3 is also a chip-select for the SPI mode. A pulldown on this pin and CMD0 may setthe card into the SPI mode, which the SDHC does not support. Note: Keep this bit set if SDIO interrupt isused.0b DAT3 does not monitor card Insertion1b DAT3 as card detection pin2–1DTWData Transfer WidthThis bit selects the data width of the SD bus for a data transfer. The host driver shall set it to match thedata width of the card. Possible data transfer width is 1-bit, 4-bits or 8-bits.00b 1-bit mode01b 4-bit mode10b 8-bit mode11b Reserved0LCTLLED ControlThis bit, fully controlled by the host driver, is used to caution the user not to remove the card while thecard is being accessed. If the software is going to issue multiple SD commands, this bit can be set duringTable continues on the next page...Chapter 49 Secured digital host controller (SDHC)K51 Sub-Family Reference Manual, Rev. 6, Nov 2011Freescale Semiconductor, Inc. 1327