Section Number Title PageChapter 49Secured digital host controller (SDHC)49.1 Introduction...................................................................................................................................................................130349.2 Overview.......................................................................................................................................................................130349.2.1 Supported types of cards..............................................................................................................................130349.2.2 SDHC block diagram...................................................................................................................................130449.2.3 Features........................................................................................................................................................130549.2.4 Modes and operations..................................................................................................................................130649.3 SDHC signal descriptions.............................................................................................................................................130749.4 Memory map and register definition.............................................................................................................................130849.4.1 DMA System Address Register (SDHC_DSADDR)..................................................................................130949.4.2 Block Attributes Register (SDHC_BLKATTR)..........................................................................................131049.4.3 Command Argument Register (SDHC_CMDARG)....................................................................................131149.4.4 Transfer Type Register (SDHC_XFERTYP)..............................................................................................131249.4.5 Command Response 0 (SDHC_CMDRSP0)...............................................................................................131649.4.6 Command Response 1 (SDHC_CMDRSP1)...............................................................................................131749.4.7 Command Response 2 (SDHC_CMDRSP2)...............................................................................................131749.4.8 Command Response 3 (SDHC_CMDRSP3)...............................................................................................131749.4.9 Buffer Data Port Register (SDHC_DATPORT)..........................................................................................131949.4.10 Present State Register (SDHC_PRSSTAT).................................................................................................131949.4.11 Protocol Control Register (SDHC_PROCTL).............................................................................................132449.4.12 System Control Register (SDHC_SYSCTL)...............................................................................................132849.4.13 Interrupt Status Register (SDHC_IRQSTAT).............................................................................................133149.4.14 Interrupt Status Enable Register (SDHC_IRQSTATEN)............................................................................133749.4.15 Interrupt Signal Enable Register (SDHC_IRQSIGEN)...............................................................................134049.4.16 Auto CMD12 Error Status Register (SDHC_AC12ERR)...........................................................................134249.4.17 Host Controller Capabilities (SDHC_HTCAPBLT)....................................................................................134549.4.18 Watermark Level Register (SDHC_WML).................................................................................................134749.4.19 Force Event Register (SDHC_FEVT)..........................................................................................................1347K51 Sub-Family Reference Manual, Rev. 6, Nov 2011Freescale Semiconductor, Inc. 45