NXP Semiconductors freescale K51 Series Reference Manual

SDHC_IRQSTAT field descriptions (continued)Field Description15–9ReservedThis read-only field is reserved and always has the value zero.8CINTCard InterruptThis status bit is set when an interrupt signal is detected from the external card. In 1-bit mode, the SDHCwill detect the Card Interrupt without the SD Clock to support wakeup. In 4-bit mode, the card interruptsignal is sampled during the interrupt cycle, so the interrupt from card can only be sampled duringinterrupt cycle, introducing some delay between the interrupt signal from the SDIO card and the interruptto the host system. Writing this bit to 1 can clear this bit, but as the interrupt factor from the SDIO carddoes not clear, this bit is set again. In order to clear this bit, it is required to reset the interrupt factor fromthe external card followed by a writing 1 to this bit.When this status has been set, and the host driver needs to service this interrupt, the Card InterruptSignal Enable in the Interrupt Signal Enable register should be 0 to stop driving the interrupt signal to thehost system. After completion of the card interrupt service (It should reset the interrupt factors in the SDIOcard and the interrupt signal may not be asserted), write 1 to clear this bit, set the Card Interrupt SignalEnable to 1, and start sampling the interrupt signal again.0b No Card Interrupt1b Generate Card Interrupt7CRMCard RemovalThis status bit is set if the Card Inserted bit in the Present State register changes from 1 to 0. When thehost driver writes this bit to 1 to clear this status, the status of the Card Inserted in the Present Stateregister should be confirmed. Because the card state may possibly be changed when the host driverclears this bit and the interrupt event may not be generated. When this bit is cleared, it will be set again ifno card is inserted. In order to leave it cleared, clear the Card Removal Status Enable bit in InterruptStatus Enable register.0b Card state unstable or inserted1b Card removed6CINSCard InsertionThis status bit is set if the Card Inserted bit in the Present State register changes from 0 to 1. When thehost driver writes this bit to 1 to clear this status, the status of the Card Inserted in the Present Stateregister should be confirmed. Because the card state may possibly be changed when the host driverclears this bit and the interrupt event may not be generated. When this bit is cleared, it will be set again ifa card is inserted. In order to leave it cleared, clear the Card Inserted Status Enable bit in Interrupt StatusEnable register.0b Card state unstable or removed1b Card inserted5BRRBuffer Read ReadyThis status bit is set if the Buffer Read Enable bit, in the Present State register, changes from 0 to 1.Refer to the Buffer Read Enable bit in the Present State register for additional information.0b Not ready to read buffer1b Ready to read buffer4BWRBuffer Write ReadyThis status bit is set if the Buffer Write Enable bit, in the Present State register, changes from 0 to 1. Referto the Buffer Write Enable bit in the Present State register for additional information.Table continues on the next page...Chapter 49 Secured digital host controller (SDHC)K51 Sub-Family Reference Manual, Rev. 6, Nov 2011Freescale Semiconductor, Inc. 1335