NXP Semiconductors freescale K51 Series Reference Manual

SPIx_RXFRn field descriptionsField Description31–0RXDATAReceive DataContains the received SPI data.46.4 Functional DescriptionThe Serial Peripheral Interface (DSPI) block supports full-duplex, synchronous serialcommunications between MCUs and peripheral devices. All communications are donewith SPI-like protocol.The DSPI has the following configurations:• SPI Configuration in which the DSPI operates as a basic SPI or a queued SPI.The DCONF field in the DSPI Module Configuration Register (MCR) determines theDSPI Configuration. See for the DSPI configuration values.The CTARn registers hold clock and transfer attributes. The SPI configuration allows toselect which CTAR to use on a frame by frame basis by setting a field in the SPIcommand. See DSPI Clock and Transfer Attributes Registers for information on thefields of the CTAR registers.Typical master to slave connections are shown in the following figure. When a datatransfer operation is performed, data is serially shifted a predetermined number of bitpositions. Because the modules are linked, data is exchanged between the master and theslave. The data that was in the master shift register is now in the shift register of theslave, and vice versa. At the end of a transfer, the TCF bit in the SR is set to indicate acompleted transfer.Shift RegisterBaud RateGeneratorShift RegisterSOUTSCKPCSxDSPI SlaveDSPI MasterSINSOUTSINSSSCKFigure 46-91. SPI Serial Protocol OverviewChapter 46 SPI (DSPI)K51 Sub-Family Reference Manual, Rev. 6, Nov 2011Freescale Semiconductor, Inc. 1151