NXP Semiconductors freescale K51 Series Reference Manual

• Valid/Invalid descriptor.• Nop descriptor.• Set data length descriptor.• Set data address descriptor.• Link descriptor.• Interrupt flag and end flag in descriptor.For ADMA2, including the following descriptors:• Valid/Invalid descriptor.• Nop descriptor.• Rsv descriptor.• Set data length & address descriptor.• Link descriptor.• Interrupt flag and end flag in descriptor.ADMA2 deals with the lower 32-bit first, and then the higher 32-bit. If the 'Valid' flag ofdescriptor is 0, it will ignore the high 32-bit. Address field shall be set on wordaligned(lower 2-bit is always set to 0). Data length is in byte unit.ADMA will start read/write operation after it reaches the tran state, using the data lengthand data address analyzed from most recent descriptor(s).For ADMA1, the valid data length descriptor is the last set type descriptor before trantype descriptor. Every tran type will trigger a transfer, and the transfer data length isextracted from the most recent set type descriptor. If there is no set type descriptor afterthe previous trans descriptor, the data length will be the value for previous transfer, or 0 ifno set descriptor is ever met.For ADMA2, tran type descriptor contains both data length and transfer data address, soonly a tran type descriptor can start a data transferTable 49-35. Format of the ADMA1 descriptor tableAddress/page field Address/page field Attribute field31 12 11 6 5 4 3 2 1 0Address or data length 000000 Act2 Act1 0 Int End ValidTable continues on the next page...Chapter 49 Secured digital host controller (SDHC)K51 Sub-Family Reference Manual, Rev. 6, Nov 2011Freescale Semiconductor, Inc. 1365