NXP Semiconductors freescale K51 Series Reference Manual

Table 29-2. EzPort Commands (continued)Command Description Code AddressBytes Data Bytes Accepted whensecure?RESET Reset Chip 0xB9 0 0 YesWRFCCOB Write FCCOB Registers 0xBA 0 12 Yes6FAST_RDFCCOB Read FCCOB registers at highspeed 0xBB 0 1 - 122 NoWRFLEXRAM Write FlexRAM 0xBC 31 4 NoRDFLEXRAM Read FlexRAM 0xBD 31 1+ NoFAST_RDFLEXRAM Read FlexRAM at high speed 0xBE 31 1+2 No1. Address must be 32-bit aligned (two LSBs must be zero).2. One byte of dummy data must be shifted in before valid data is shifted out.3. Address must be 64-bit aligned (three LSBs must be zero).4. A section is defined as the smaller of either half the size of FlexRAM or the flash sector size. Total number of data bytesprogrammed must be a multiple of 8.5. Bulk Erase is accepted when security is set only if the BEDIS status bit is not set.6. Note that the Flash will be in NVM Special mode, restricting which types of commands can be executed throughWRITE_FCCOB when security is enabled.29.3.1 Command DescriptionsThis section describes the module commands.29.3.1.1 Write EnableThe Write Enable command (WREN) sets the write enable register bit in the EzPortstatus register. The write enable bit must be set for a write command (SP, SE, BE,WRFCCOB or WRFLEXRAM) to be accepted. The write enable register bit clears onreset, on a Write Disable command, and at the completion of write command. Thiscommand should not be used if a write is already in progress.29.3.1.2 Write DisableThe Write Disable command (WRDI) clears the write enable register bit in the statusregister. This command should not be used if a write is already in progress.29.3.1.3 Read Status RegisterThe Read Status Register command (RDSR) returns the contents of the EzPort statusregister.Chapter 29 EzPortK51 Sub-Family Reference Manual, Rev. 6, Nov 2011Freescale Semiconductor, Inc. 685